Ultrasparc visual instruction sets

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This paper describes the visual instruction set (VIS). This is a RISC-like SPARC processors. VIS’s first implementation is in the new UltraSPARC microprocessor.
Visual Instruction Set. The implementation of VIS directly on UltraSPARC, coupled with the highly optimized memory system already developed for general
Visual Instruction Set, or VIS, is a SIMD instruction set extension for SPARC V9 UltraSPARC and SPARC64 microprocessors implement the instruction set.
This paper describes the visual instruction set (VIS). This is a RISC-like extension to the SPARC V9 instruction set that provides core instructions that g.
UltraSPARC introduces a comprehensive set of graphics instructions that Zhou, C., et. al., “MPEG Video Decoding with UltraSPARC Visual Instruction Set,”.
Mar 5, 1995 –
Visual Instruction Set (VIS) — система команд SIMD для микропроцессоров SPARC V9, VIS 2 впервые использовалась на UltraSPARC III.
E.6 UltraSPARC and VIS Instruction Set Extensions. This section describes extensions that require SPARC-V9. The extensions support enhanced graphics
Visual Instruction Set (VIS) — система команд SIMD для микропроцессоров Sun на микропроцессорах UltraSPARC (1995) и корпорацией Fujitsu на
Mar 19, 1996 –
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