Subs instruction in arm

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Syntax SUBS{cond} pc, lr, #imm ; ARM and Thumb code MOVS{cond} pc, ARM and Thumb Instructions > General data processing instructions > SUBS pc, lr
Thus the complete add instruction, in assembler format, would be: ADD R0, R1, R2 ;R0 = R1 + R2. Most ARM mnemonics consist of three letters, e.g. SUB, MOV,
22 Aug 2008 Thumb instruction formats are less regular than ARM instruction formats, as a result of the dense MOVs, ADDs, SUBs and RSBs with shifts.
The ADD instruction adds the value of Operand2 or imm12 to the value in Rn . The ADC instruction adds the values in Rn and Operand2 , together with the carry
This chapter introduces the ARM instruction sets based Different versions of ARM processors share the same basic machine instruction .. SUBS R1, R1, #1.
I think it important to note that Thumb only has 2 fields for SUBS instructions so any logic using 3 fields cannot be carried out in 1 instruction.The ADD instruction adds the values in Rn and Operand2 . The SUB instruction subtracts the value of Operand2 from the value in Rn . The RSB (Reverse
SUBS pc, lr, # imm writes an address to the PC. The alignment of this address must be correct for the instruction set in use after the exception return: For a return to ARM, the address written to the PC must be word-aligned. For a return to Jazelle, there are no alignment restrictions on the address written to the PC.
This is a special case instruction in Thumb-2. The same instruction is available in ARM code as a normal form of the SUB instruction described in ADD, SUB,
4 May 2014 I saw a lot of instruction ( add is not the only one) with an extra s at the end ( adds , subs , ). I looked a bit to the ARM documentation and it

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